https://github.com/sp193/ps2toolchain
Most discussion is here: http://psx-scene.com/forums/f19/completi...c5-154680/
Most discussion is here: http://psx-scene.com/forums/f19/completi...c5-154680/
SP193;1201016 Wrote:In roughly 2012, Mega Man added official support for the MIPS R5900 (Emotion Engine) to Binutils and GCC.
Binutils itself has full support for the EE, but GCC only has basic support; it still lacks the EE-specific features that other MIPS processors do not have.
This includes (but not limited to):
- 128-bit loads/stores (Also considered part of MMI, but the patch is in a different place)
- support for the 2nd pipeline (i.e. mult1, div1 instructions, as well as the hi1 and lo1 registers).
- support for optimizations related to MMI.
I feel that this should be done, so that we won't need to constantly "chase the sun" when it comes to having functional tools. While the current tools do work, they sometimes don't play nice with newer operating systems and have some bugs.
My efforts here are for GCC 5.3.0. I built it with the latest version of Cygwin because my laptop in campus is a Windows laptop.
Hopefully, it would be possible to submit a full patch to the GCC steering committee. But at worst, I suppose that keeping it as a PS2-only patch would do.
Configure syntax:
Code:../configure --prefix="$PS2DEV/ee" --target="mips64r5900el-ps2-elf" --program-prefix="ee-" --enable-languages="c" --disable-nls --disable-shared --disable-libssp --disable-libmudflap --disable-threads --disable-libgomp --disable-libquadmath --disable-target-libiberty --disable-target-zlib --without-ppl --without-cloog --with-headers=no --disable-libada --disable-libatomic --disable-multilib --with-float=hard
I have managed to add support for 128-bit loads/stores, as well as passing 128-bit variables by value.
I think that I have added support for the 2nd pipeline, but I don't know how to test that because GCC finds the mult instruction too convenient. I feel uncertain about the implementation of this system because some expands (i.e. mulsidi3_64bit_split) in mips.md allocate a register with MD_REG_FIRST, so I don't know if this definitely means that hi1 and lo1 won't ever be used.
The following register constrains were added:
- wr - LO1/HI1 combined pseudo register
- wl - LO1 register
As for processor-specific constrains:
- H - returns the current R5900 pipeline used (i.e. used to specify whether mult1 or mult is to be used).
I have yet to add support for MMI, but I feel that it wouldn't be as hard/important as adding support for the 2nd pipeline (no other MIPS has a true 2nd pipeline!).
It should be a better move to confirm that GCC is still working fine, even after the first two features are completed.
Please feel free to give comments/guidelines/suggestions because I am not so good with working with something as complex as GCC. Particularly with its RTL.
Patches:
128-bit load/stores only: https://www.sendspace.com/file/000v9n
128-bit load/stores + 2nd pipeline: https://www.sendspace.com/file/qry9ks