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PS2/PStwo hardware
#1
Hi everybody!
I am new to this forum, and as I am a french student, I do not speak (hem, write...) very well English. If you see I post with English language related errors, I would like you correct me please.
As I am new to this forum, if I started to post in a wrong way, you can correct me too, then I will know where to post correctly.
As I said it, I am student, so I study industrial electronics and informatics. Of course, I am interested in PS2/PStwo technical hardware docs. I know that the EE is nearly as the Toshiba TX79, so I downloaded the TX79's technical datasheet. I read on the web that this processor is MIPS architecture compliant, and accordling to the datasheet, it uses RISC instruction set. I read it has a ( or an ? ) Serial In/Out (SIO) port, and it is not used by PS2/two hardware (not connected), as the JTAG port, which is used for hardware debugging and tests.
My goal is to explore these functionnalities to offer hardware debugging support to the real PS2/two, perhaps it could help in PCSX2/homebrew/demos development.
I usually code in assembler language using fasm, tasm, nasm, for Intel x86 architectures.
I use (legal) Visual Studio 2008 Professionnal, and I usually write code using C, C sharp, and (new for me), C++, and my code uses dot Net from Microsoft. So I could code Windows services and programs, if you need help in PCSX2 development.
I use Code Essentials from Texas Instrument to program MSP430 devices(via JTAG) using assembler or C languages, in case of need...
I need PCSX2 community help to develop my hardware debugger, if you have some PS2/two processor's datasheet and pinout it should help me in a very good way.

Thank you by advance !
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#2
Welcome, is this the sort of thing you are after? http://www.kanshima.net/mirrors/ee-sio/ps2-ee-sio.html

unfortunately, technical documents on the SIO port are very limited in availability.
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#3
Yes, this is this sort of thing I am after. If you have links or technical docs and pinout for JTAG interface, too...
Maybe we could write debug commands using that kind of connection, in the same as on a PC using the SIO, and as on every processor using JTAG.
Thank you very much for the link you provided, it will be usefull to me.
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#4
I am afraid i do not have technical documents for the JTAG pin outs. As i said documentation is limited, hardware schematics even more so.
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#5
Sony protects his documentation, of course. The only hardware schematics I found on the net are modchip schematics... but I am going to try the schematics you gave me. Thank you again for your help !

EDIT: from the other post:
I could work on opcode translation, or things like that if the dev team needs help
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#6
I answered your pm anyway.

P.S. sorry for the little mishap Smile
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