--- 1	2011-08-24 17:04:06.045456791 +0300
+++ 2	2011-08-24 17:04:25.876804151 +0300
@@ -1,13 +1,63 @@
 
 Generating SSE-optimized unpacking functions for VIF interpreters...
-VIF SSE-optimized Unpacking Functions @ 0xB13EB000 -> 0xB13FB000 [64kb]
+VIF SSE-optimized Unpacking Functions @ 0xA70F2000 -> 0xA7102000 [64kb]
 Unpack function generation complete.  Generated function statistics:
-	Reserved buffer    : 12288 bytes @ 0xB13EB000
+	Reserved buffer    : 12288 bytes @ 0xA70F2000
 	x86 code generated : 4294957838 bytes
 	
 (UpdateVSyncRate) Mode Changed to NTSC.
 (UpdateVSyncRate) FPS Limit Changed : 59.94 fps
 csr.RESET
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
 (IsoFS) Block 0x10: Primary partition info.
 (IsoFS) Filesystem is ISO9660
 (SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_531.33;1
@@ -23,6 +73,56 @@
 (SYSTEM.CNF) Software version = 1.00
 (SYSTEM.CNF) Disc region type = PAL
 csr.RESET
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
+microVU0: Waiting on VU1 thread to access VU1 regs!
 csr.RESET
 (UpdateVSyncRate) Mode Changed to PAL.
 (UpdateVSyncRate) FPS Limit Changed : 50.00 fps
