#PCSX2 version: any from 1.5.0 below.
#CPU options: IOP defaults - makes no change EE - interpreter can get a bit farther.
#Plugins latest GSDX opengl hardware and directx 11 hardware.
# Description: Certain levels like volkan city inferno will crash pcsx2 or freeze on a black screen or the now loading text. EE interpreter gets farther along then re compiler.
The strangest thing is that pcsx2 in linux 1.4.0 doesn't crash when such levels are loaded but due to issues with pcsx2's audio engine this game can only render audio in windows because if the latency is set above 3 to maybe 4 ms this game will not render audio which is only set able in windows async Linux goes as low as 40 ms.
from linux when the level loads correctly.
from windows when level loads incorrectly and freezes.
Github link: https://github.com/PCSX2/pcsx2/issues/2349
#CPU options: IOP defaults - makes no change EE - interpreter can get a bit farther.
#Plugins latest GSDX opengl hardware and directx 11 hardware.
# Description: Certain levels like volkan city inferno will crash pcsx2 or freeze on a black screen or the now loading text. EE interpreter gets farther along then re compiler.
The strangest thing is that pcsx2 in linux 1.4.0 doesn't crash when such levels are loaded but due to issues with pcsx2's audio engine this game can only render audio in windows because if the latency is set above 3 to maybe 4 ms this game will not render audio which is only set able in windows async Linux goes as low as 40 ms.
Code:
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
32bit Stall Source Changed to 3
32bit Stall Destination Changed to 4
padman: *** VBLANK OVERLAP ***
microVU1: Cached Prog = [006] [PC=0020] [List=01] (Cache=0.144%) [0.1mb]
microVU1: Cached Prog = [007] [PC=00d0] [List=01] (Cache=0.144%) [0.1mb]
microVU1: Cached Prog = [008] [PC=0010] [List=02] (Cache=0.186%) [0.1mb]
microVU1: Cached Prog = [009] [PC=0070] [List=01] (Cache=0.187%) [0.1mb]
microVU1: Cached Prog = [010] [PC=0070] [List=02] (Cache=0.201%) [0.1mb]
microVU1: Cached Prog = [011] [PC=0040] [List=02] (Cache=0.202%) [0.1mb]
microVU0: Cached Prog = [006] [PC=0000] [List=02] (Cache=0.037%) [0.0mb]
microVU0: Cached Prog = [007] [PC=0040] [List=01] (Cache=0.042%) [0.0mb]
32bit Stall Source Changed to 0
32bit Stall Destination Changed to 0
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
padman: *** VBLANK OVERLAP ***
padman: *** VBLANK OVERLAP ***
padman: *** VBLANK OVERLAP ***
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
32bit Stall Source Changed to 3
32bit Stall Destination Changed to 4
microVU0: Cached Prog = [008] [PC=0080] [List=01] (Cache=0.045%) [0.0mb]
padman: *** VBLANK OVERLAP ***
microVU1: Cached Prog = [012] [PC=0090] [List=03] (Cache=0.288%) [0.2mb]
microVU1: Cached Prog = [013] [PC=0080] [List=01] (Cache=0.288%) [0.2mb]
from linux when the level loads correctly.
Code:
microVU1: Cached Prog = [008] [PC=0010] [List=02] (Cache=0.272%) [0.2mb]
microVU1: Cached Prog = [009] [PC=0070] [List=01] (Cache=0.272%) [0.2mb]
microVU1: Cached Prog = [010] [PC=0070] [List=02] (Cache=0.286%) [0.2mb]
microVU1: Cached Prog = [011] [PC=0040] [List=02] (Cache=0.287%) [0.2mb]
microVU0: Cached Prog = [001] [PC=0010] [List=01] (Cache=0.013%) [0.0mb]
microVU0: Cached Prog = [002] [PC=0050] [List=01] (Cache=0.023%) [0.0mb]
microVU0: Cached Prog = [003] [PC=0090] [List=01] (Cache=0.030%) [0.0mb]
microVU0: Cached Prog = [004] [PC=0030] [List=01] (Cache=0.036%) [0.0mb]
microVU0: Cached Prog = [005] [PC=0070] [List=01] (Cache=0.047%) [0.0mb]
microVU0: Cached Prog = [006] [PC=0000] [List=02] (Cache=0.056%) [0.0mb]
microVU0: Cached Prog = [007] [PC=0040] [List=01] (Cache=0.061%) [0.0mb]
32bit Stall Source Changed to 0
32bit Stall Destination Changed to 0
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode NTSC 640x448 @ 59.940 (59.82)
32bit Stall Source Changed to 3
32bit Stall Destination Changed to 4
microVU0: Cached Prog = [008] [PC=0080] [List=01] (Cache=0.065%) [0.0mb]
recVifUnpk: Bucket 0x0938 has 4 micro-programs
recVifUnpk: Bucket 0x092a has 4 micro-programs
recVifUnpk: Bucket 0x0943 has 4 micro-programs
recVifUnpk: Bucket 0x0940 has 4 micro-programs
microVU1: Cached Prog = [012] [PC=0090] [List=03] (Cache=0.423%) [0.3mb]
microVU1: Cached Prog = [013] [PC=0080] [List=01] (Cache=0.424%) [0.3mb]
Github link: https://github.com/PCSX2/pcsx2/issues/2349